1. Field of the Invention
The present invention relates to projection exposure for transferring an image of an original image pattern on a mask or a reticle onto a substrate such as a wafer through a projection optical system.
2. Related Background Art
An exposure apparatus of this type has a projection lens having a high power and can transfer a submicron line pattern onto a semiconductor wafer. The image field of the projection lens is generally small with respect to the entire surface of the wafer. For this reason, so-called step-and-repeat exposure is performed such that a projected image of a pattern formed on a reticle is repeatedly exposed onto the wafer every time the wafer is stepped. In this case, if an identical circuit pattern is repeatedly formed on the entire surface of the wafer, only one reticle is required. However, if a test circuit pattern is partially formed on the wafer, in addition to practical circuit patterns, at least two reticles must be prepared for a given layer. Since two reticles cannot be simultaneously used in a conventional projection exposure apparatus, the reticle for exposing the practical circuit pattern must be replaced with the reticle for forming the test circuit. In this case, alignment marks are formed at the common positions of these reticles, and reticle alignment using the alignment marks is an indispensable operation upon replacement of reticles. Reticle replacement and alignment inevitably require time-consuming operations.
Another conventional technique is disclosed in Japanese Laid-Open Patent Application No. 221758/1985. According to this technique, different circuit patterns (i.e., both practical and test circuits) are preformed on a single reticle. A wafer stage is positioned as follows. A reticle blind is shifted to change the shape and size of an illumination aperture such that the pattern excluding the required circuit pattern is not illuminated with light, and that only the projected image of the required pattern is formed on a predetermined position on the wafer. In this case, the system must be designed such that if the reticle blind is fully open, all the different circuit patterns are exposed on the wafer through the projection lens. Therefore, the sizes of the images of individual circuit patterns within the image field of the projection lens are greatly limited, resulting in inconvenience. Since the image field of the projection lens is divided into small areas, image distortions in the small areas slightly differ from each other. As a result, matching precision during overlapping exposure cannot be improved.
In recent years, a chip integration or wafer integration scheme has been proposed to produce VLSIs. In this case, the size of a circuit pattern image to be transferred is desired to be as large as that limited by only the image field of the projection lens. At the same time, replacement of original image patterns in a short period of time is also desired. When a circuit pattern having a larger size than the maximum shot area determined by the image field or the like of the projection lens is to be formed, screen synthesis must be used. In this case, high-speed original image pattern replacement is desired.
However, no conventional apparatuses satisfy both high speed and high precision on a practical basis. Therefore, strong demand has arisen for developing a projection exposure apparatus which may be suitably used for chip integration, wafer integration, and screen synthesis.